IC Physical Design Engineer

il y a 4 semaines


Paris, Île-de-France Snap Inc. Temps plein

About the Role

We are seeking a highly skilled IC Physical Design Engineer to join our team at Snap Inc. As a key member of our silicon design team, you will be responsible for ensuring that our designs achieve specified timing, while maintaining low power and small silicon area.

Key Responsibilities

  • Contribute to artificial intelligence ASIC, which will be used in wearable devices that lead to exciting launches of hardware at Snap
  • Contribute to all phase of the design from netlist to GDSII with a particular focus on physical implementation
  • Drive our partners to ensure the execution is smooth and we reach our PPA targets
  • Facilitate feedback to our design team on any architecture improvements needed to get the best design
  • Architect floor plan strategy with the silicon design team
  • Define design partitioning together with external partners and our Silicon design teams
  • Work on timing closure and power closure
  • Lead DRC/LVS analysis and responsible for resolution of any related issues
  • Conduct physical design experiments for future chips to establish tradeoff for next generation products
  • Improve our CAD methodology to get better PPA

Requirements

  • Ample experience with silicon back-end flows and PPA analysis for 12nm technology or below
  • Excellent understanding of physical aspects of silicon design, i.e. impact of design choices on timing, area, and power consumption
  • Extensive experience with timing closure and power optimization
  • Solid experience with building power grid and clock tree structures
  • Deep Understanding of Physical Design Verification methodology to debug LVS/DRC issues at chip/block level
  • A proven leader able to help grow and shape the organization to achieve our goals
  • Familiarity with low-power design techniques and methodologies, such as multi-voltage domains and power gating using UPF
  • Experience with handling integration of mixed signal IP such as PCIe, MIPI, PLL, etc.
  • Experience in designing WLCSP chips with an emphasis in RDL design
  • Solid programming and scripting skills (2+ years of e.g. C, SystemC, C++)

What We Offer

  • A competitive compensation package
  • A comprehensive benefits program
  • A dynamic and inclusive work environment
  • Opportunities for professional growth and development


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