Engineer - Testing

il y a 2 jours


Paris, France European Tech Recruit Temps plein

Digital Verification Engineer - VHDL / Verilog / UVM Location: We're partnered with a fast-growing well-funded Semiconductor Company who is looking for a skilled 'Digital Verification Engineer' to join their team in either Paris or Grenoble, France.

Establish and execute custom verification approaches to thoroughly test circuit functionality.
Craft self-contained test benches for individual blocks, subsystems, and the entire design, incorporating virtual intellectual property (VIPs).
Automate regression testing on RTL and gate-level netlists, ensuring adherence to verification plans.
You have a MSc or PhD in Electrical Engineering or equivalent.
~You have solid knowledge of a digital hardware description languages (VHDL or Verilog)
~ You have solid knowledge of System Verilog
~ By applying to this role you understand that we may collect your personal data and store and process it on our systems. For more information please see our Privacy Notice (


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