Formal Verification Engineer

il y a 2 jours


Sophia Antipolis, France Arm Temps plein

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Arm’s Sophia Antipolis design centre is located in one of the most beautiful parts of France, at the heart of Europe’s largest and most dynamic technology park. Surrounded by mountains and the Mediterranean Sea, this exceptional design centre has delivered leading products from Arm’s Cortex (TM) processor family.

As a Formal Verification Engineer, you will integrate a team the role of which is to guarantee the correct functioning of the IP, focusing on its correct functional behaviour in all possible conditions.

Would you like to work in a multi-site and multi-cultural environment? Are you creative, innovative and passionate about new technologies? If so, we would love to hear from you, this is the right time and the best place to join.

**You will be accountable for**:

- Understanding the specification of the IP you will target;
- Defining and documenting the verification environment you will use to find bugs in the design; plus specifying the verification sign-off criteria;
- Building and maintaining the testbench by using an appropriate methodology and programming language(s);
- Running tests to stress the design in its last corner cases and find all possible bugs.

**Job requirements**:
**Education & Qualifications**

You will have a good university degree, ideally in electronic engineering or computer science, although other graduates would be considered if they have relevant experience.

**Experience**

You should have at least 2 years in functional verification or digital hardware design, and, preferably but not mandatory, previous experience with formal methods (e.g. SVA, PSL, model checking, theorem proving)

**Essential Skills & Experience**
- Understanding of the fundamentals of hardware design and verification
- Knowledge of hardware description and verification languages e.g. Verilog, VHDL, SystemVerilog, PSL
- Proficiency in algorithms and software programming
- Proficiency in scripting languages, e.g. Python/Perl/TCL
- Communicating fluent English

**Desirable Skills & Experience**
- Formal verification tools and methods
- Understanding of the end to end verification processes, from test plan creation through to verification closure
- Experience with RTL and simulators
- Familiarity with ARM architectures and instruction sets
- Experience of Unix development environment
- Good level of French can be a good advantage

***Why you will love this job?**:
You will work directly with engineers across the company to build next-generation IPs and CPUs. You will have a direct impact on our bottom line and the ability to deliver improvements for our customers. You will be part of a growing, fast-paced, and fun team. You will have ownership for the implementation of your work.

We have a friendly and high-performance working environment, where Arm offers a competitive benefits package in France including: private medical insurance (employee and family), 25 days annual leave, 20-day sabbatical every four years, supplementary pension and reduction in working hours (11 days).

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**Equal Opportunities at Arm**:
Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of any characteristic.

**Hybrid Working at Arm**:
Arm’s hybrid approach to working is centred around flexibility, where we split our time between the office and other locations to get our work done. We empower groups/teams to determine their hybrid working pattern, with an expected minimum attendance in the office of 20% per month, depending on the work, level of experience and team’s needs. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution.


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