Senior Rtl Design Engineer

il y a 2 semaines


Sophia Antipolis, France NXP Semiconductors Temps plein

In the MCU-MPU Engineering organization, the System-On-Chip team based in Munich (Germany) and Sophia Antipolis / Grenoble (France) is in charge of the i.MX product family development. We are looking for a senior RTL Design Engineer strengthening our SoC design capabilities in one of these locations.

In this exciting role, you will be challenged by taking your part in the future of Automotive for the i.MX9 and i.MX10 next generation development.

For decades, we at NXP have been developing innovative microchips that can be found almost everywhere - and make life possible as we know it today. Whether it’s in credit cards, in smartphones or cars - we as a world market leader make sure that your life is easier, better and safer.

**Your responsibilities**:
Assess and close requirements with the architecture and product teams to ensure complex functions and complete SoC can be designed efficiently and meet customer needs.

Develop and integrate complex digital functional blocks or subsystems.

Build up expertise in one or more functional areas like for Clocking, Reset, Cores & Interconnects, Power Management, Debug & Trace and several others.

SoC RTL/UPF integration using state-of-the-art tools, flows and methodologies

Driving key SoC design methodologies in close collaboration with global cross functional teams, Design Enablement and others

Over time assume technical leadership roles to own and drive complex technical solutions in close collaboration with other engineers and functional teams.

Mentoring other engineers based on deep core competence and expertise

**Cross functional aspects of job**

Work very closely with functional verification and DFT team to ensure high quality standards

Design Lead of SOCs - to define DFT solution and integration into the rest of the SOC

Chief Engineer - to define overall DFT requirements and architecture

Senior leaders of functional teams - to ensure all activities are properly resourced and risk is managed

**Your profile**

Several years’ experience in the field of DFT design techniques, tools and methodology

Deep experience with ATPG and Memory-Test-and-Repair and other DFT topics

Experience with test engineering requirements and test pattern development for product launch

Understanding of test requirements for the automotive market

Strong problem solving skills in a fast-paced environment

Fluent in English

Strong team player
- 10+ years of experience in digital chip design
- Master's degree in Electrical Engineering, Computer Engineering or Electrical Computer Engineering
- Solid understanding of system-on-chip development
- Solid knowledge of ARM standards, processors and interconnects

Requires experience with cross functional teams and good communication skills to operate in a global environment with multiple partners.

Fluent in English language both oral and written

Excellent communication skills, both verbal and in writing.


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