Application Engineer
il y a 2 semaines
**Siemens Digital Industries Software - Where today meets tomorrow.**
**Siemens EDA** is a global technology leader in **electronic design automation** and part of Siemens Digital Industries Software.
Our technologies enable companies around the world to develop new, highly innovative electronic products faster and more cost-effectively. Our customers use our solutions to push the boundaries of technology to deliver better products in the increasingly complex world of **chip, board and system design.**
**About the role**
**Application Engineer** is the key connection between Siemens EDA and its customers. It’s a dynamic & challenging role, requiring deep technical expertise, strong communication & business skills, and continuous development of knowledge & skills.
You will work with businesses across all technology sectors, helping them to address their technical and business challenges by using our latest verification solutions. As member of an account team you will drive the growth of Siemens EDA functional verification business in Europe, through the successful adoption and expansion of our products and services.
**Key challenges**
- **Drive business** for Siemens EDA using hands-on technical expertise by **working directly with customers**
- ** Provide customer verification methodology guidance**, verification tools training, and verification problem identification & resolution.
- ** Build & maintain ongoing positive relationships with customers**, understanding their technical needs & challenges.
- ** Manage multiple customer issues concurrently**, prioritise activities as required. Work with design & verification engineers as well as their level managers.
- ** Provide technical feedback** to product development teams relating to critical issues and recommended product enhancements.
**Your profile**
**Required**
- Degree in Electrical and Computer Engineering (or equivalent) with **at least 3 years of experience in functional verification**
- ** Expertise in advanced verification methodologies & environments (such as UVM) is critical including coverage & debug**
- A strong understanding of design and verification concepts in **ASIC & FPGA** flows
- Verification planning and management experience with block level and top-level designs
- Expertise in coding with Verilog/VHDL/SystemVerilog, UVM, PSL/SVA
- Experience with Linux and Windows environments including scripting language
- ** Excellent presentation and interpersonal skills**
- ** Self-motivated and self-disciplined**
- ** Proficient English**
- ** Willing to travel (domestically and internationally)**
**Assets & Nice to have**
- Experience with Verification IP
- Experience with Formal & Emulation technology
- Knowledge of local language (French in France, Italian in Italy)
**Why us?**
Working here means **flexibility** - choosing between working at home and the office at other times is the norm here. We offer great **benefits** and rewards, as you'd expect from a world leader in industrial software.
We are an **equal opportunity employer and value diversity** at our company. We do not discriminate on the basis of race, religion or belief, colour, national origin, sex, gender, gender expression, sexual orientation, age, marital status, pregnancy and parental leave, trade union membership, veteran status, or disability status.
**Siemens EDA offers**
- A competitive base salary plus a sales performance based variable payment
- A company car or car allowance
- A range of local benefits including pension, healthcare and wellness
LI-ZM1
LI-Hybrid
LI-EDA
DISW
**Job Family**: Sales
**Req ID**: 369045
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