Cadence Layout Engineer
il y a 4 heures
OverviewMACOM designs and manufactures semiconductor products for Data Center, Telecommunication and Industrial and Defense applications. Headquartered in Lowell, Massachusetts, MACOM has design centers and sales offices throughout North America, Europe and Asia. MACOM is certified to the ISO9001 international quality standard and ISO14001 environmental management standard. MACOM has more than 65 years of application expertise with multiple design centers, Si, GaAs and InP fabrication, manufacturing, assembly and test, and operational facilities throughout North America, Europe, and Asia. MACOM offers foundry services that represent a key core competency within our business. MACOM sells and distributes products globally via a sales channel comprised of a direct field sales force, authorized sales representatives and leading industry distributors. Our sales team is trained across all of our products to give our customers insights into our entire portfolio. MACOM is an Equal Opportunity Employer committed to a diverse workforce. MACOM will not discriminate against any worker or job applicant on the basis of race, color, religion, gender, gender identity, gender expression, national origin, ancestry, age, sexual orientation, marital or civil partnership status, pregnancy, disability, genetic information, veteran status, military obligations, or membership in any other category protected under applicable law.ResponsibilitiesIn this role layout engineer with closely work with analog design team to layout and verify custom analog/mixed-signal IPsLead full-custom IC layout design and verification, including chip floorplanning, analog IP layout and chip level layout integration of various analog, mixed signal and ASIC blocksFull verification of Block level and top-level layout including extraction, DRC, LVS, and DFM checkingLayout schedule planning and working with other IP layout engineers to integrate various layout blocksCo-work with designers on block level and top-level floor planningLayout review for power/GND routing, electromigration, signal path check, matching, and signal couplingQualificationsHigh-speed Mixed-Signal layout design expertiseMinimum 5 years of custom layout experienceKnowledge of Cadence Virtuoso design flowHigh level proficiency in interpretation of CALIBRE DRC, ERC, LVS reportsFull understanding of IR drop, RC delay, Electro migration and chip finishingAbility to do floor planning and do area estimateGood communication with circuit designer and other layout engineersFamiliarity with high-speed BiCMOS layout is a plusScripting in Cadence is a plusBachelor degree in Engineering #J-18808-Ljbffr
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