Application engineer in Digital IC design and STA

il y a 3 jours


Grenoble, France Cadence Temps plein

Application Engineer – Digital IC Design & STA This is an excellent opportunity to work on challenging and complex SoC projects at advanced technology nodes with leading companies in the semiconductor domain. Responsibilities Validate new tool releases through exhaustive regression testing in collaboration with Product Engineers & Product Validation Engineers. Understand and enhance timing analysis mechanisms for advanced nodes. Investigate and resolve complex timing issues, including algorithmic and physical phenomena. Analyze dependencies between timing analysis and the broader digital implementation flow. Write and maintain timing constraints; perform cross-domain clock checking as part of signoff validation. Assist in integrating new STA requirements into the tool for advanced technologies. Promote and present new features; guide and support customers in integrating the latest Tempus technologies into their design flow. Support customers in using signoff tools on live projects, including timing optimization setup issues, convergence challenges, timing ECO flows and improving workflows and tool efficiency. Qualifications Good knowledge of Static Timing Analysis (STA) and signoff methodologies. Hands‑on experience with digital implementation flows, timing optimization, SDC and CDC checks. Working knowledge of UNIX/Linux, scripting (C-shell, TCL/TK, Python). Exposure to AI/ML techniques and interest in applying them for design optimization, verification, or predictive analysis. Good understanding of digital IC design and EDA tools (experience with Cadence Innovus/Tempus is a plus). 4–15 years of experience in digital design flow and timing analysis. Degree in Electrical/Electronic Engineering, Microelectronics, or a related discipline. Good communication skills; fluency in English; French is a plus. Location Grenoble, Auvergne‑Rhône‑Alpes, France Referrals increase your chances of interviewing at Cadence by 2x. #J-18808-Ljbffr


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