R&D engineer, software programming for hardware development

Company: Qualcomm France S.A.R.L. Job Area: Engineering Group, Engineering Group > ASICS Engineering Qualcomm France (QITC Qualcomm Interconnect Technology Center) division develops and deploys custom‑built interconnect (NoC – Network‑on‑Chip) hardware IPs, software tools, exploration and verification methodologies so that SoC integration teams can quickly assemble SoCs with the desired Power Performance Area (PPA) characteristics. To this end, QITC technology embraces the complete SoC infrastructure to provide increased SoC performance at minimal cost for integration. Our work is at the backbone of the SoC, interconnecting all major IP solutions. You will join a team of talented engineers that creates and implements solutions aiming at increasing the division’s productivity mainly through automation. According to the missions, the team takes actions at various stages of the product’s development cycle. The team is also involved in enabling new technologies required by next generation products. The engineer would be responsible of various missions aiming at automating NoC components deployment in order to enrich our tool suite. This is a challenging position, working on the most innovative technologies, surrounded by experts and interacting with other teams according to the missions. Responsibilities: Write C++ libraries to emulate components (randomized but valuable traffic generation, e.g., AMBA CHI) Write C++ libraries such as protocol checkers or other generic problem‑solving libraries Write Python components and scripts to automate and instrument the flow Take part in the continuous enhancement of the current tool chain (Python, Bash, third‑party tools, e.g., from Cadence and Synopsys) Participate in the creation of a web platform (Docker, Kubernetes, VueJS, MongoDB) Required Skills and Experience: C++ – good Python – average Shell scripting, command line – average Git Mathematics background Optional Skills: Hardware RTL design and/or verification methods (SystemVerilog, VHDL, SystemC, test benches, EDA tools: Cadence Xcelium and JasperGold, Synopsys VCS) Cache coherency knowledge Understanding of hardware communication protocols (AXI, ACE, AHB, CHI, …) C++ tools: Clang, GCC, GDB, linters Educational Requirements: Engineering degree / MSc degree and above in computer science, micro‑electronics or similar field. All experience levels are welcome to apply. Location: Sophia Antipolis. Friendly working environment is part of Qualcomm's culture. Benefits: Salary, stock and performance‑related bonus Maternity / Paternity leave Employee stock purchase scheme Matching pension scheme Education assistance Relocation and immigration support Life, medical, income and travel insurance Subsided memberships for physical and mental well‑being Employee run clubs, including running, music, biking and many more Minimum Qualifications: Bachelor's degree in Science, Engineering, or related field. Qualifications are open to candidates with equivalent experience who can demonstrate an ability to fulfill the principal duties of the role and possess the required competencies. Qualcomm is an equal‑opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disability‑accomodations@qualcomm.com. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to participate in the hiring process. If you would like more information about this role, please contact Qualcomm Careers. #J-18808-Ljbffr