Junior Hardware Verification Engineer
il y a 2 jours
OverviewWe have had a very exciting opportunity become available for a Junior Hardware Verification Engineer in France.ROLE: Junior Hardware Verification Engineer (H/F)LOCATION: Sophia Antipolis, FranceDURATION: PermanentSALARY: NegotiablePosition OverviewAs a Junior Hardware Verification Engineer, you will play a key role in verifying highly configurable IPs, ensuring quality and reliability through comprehensive testing and automation.Key ResponsibilitiesDefine, document, develop, and execute RTL verification tests and coverage for highly parameterized IPs using Python and C++.Ensure compatibility of verification tests with various RTL simulators (Cadence, Synopsys, etc.).Maintain and enhance the verification workflow, focusing on improving metrics and increasing automation.Develop and implement verification components such as Bus Functional Models (BFMs) and monitors used in test benches.Your ExpertiseSolid understanding of hardware RTL design and verification languages: VHDL, Verilog, SystemC, C++, Python, SystemVerilog.Experience in verification methodologies and infrastructure: VIPs, UVM, testbeds, and EDA tools.Knowledge of formal proof verification methods is a plus.Proficiency in shell scripting.Familiarity with interconnect technologies is an advantage.Understanding of hardware communication protocols (AMBA, OCP, others).Strong written and verbal communication skills in both French and English.Curious, autonomous, rigorous, results-driven, with a strong commitment to quality.Proven ability to collaborate effectively within a team environment.Education requirementsMaster’s degree or Doctorate in Engineering, Computer Science, or a related field. #J-18808-Ljbffr
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