Senior Silicon Physical Design Engineer

il y a 8 heures


Valbonne, France Axelera AI Temps plein

Senior Silicon Physical Design Engineer – Axelera AI Axelera AI is a next‑generation AI platform company with a world‑class team of 220+ employees across 17 countries, headquartered at the High Tech Campus in Eindhoven, Netherlands. In four years, we raised $120 million, built the Metis™ AI Platform, and have a strong pipeline exceeding $100 million. Position Overview As a Senior Silicon Physical Design Engineer, you will develop cutting‑edge multi‑core in‑memory compute SoCs, handling all aspects from RTL to GDS—including synthesis, floorplanning, place & route, extraction, timing analysis, and physical verification. You will collaborate with architecture, RTL, and verification teams to ensure project success. Key Responsibilities Perform synthesis, floorplanning, place and route, extraction, timing analysis, and physical verification. Generate constraints, perform timing analysis and optimization. Execute clock‑tree synthesis (CTS) and custom clock‑building techniques. Integrate IPs including memories, I/Os, embedded processors, DDR, networking fabrics, and analog IPs. Utilise EDA tools such as Primetime, StarRC, Genus, Innovus, Design Compiler, ICC/ICC2, FC, and Calibre. Develop automation scripts in Python, Tcl, Bash and contribute to flow development. Debug and solve technical challenges related to physical design. Collaborate with architecture, RTL, and verification teams. Qualifications 10+ years of experience in Physical Design from RTL to GDS. Strong communication and teamwork skills. Expertise in all aspects of physical design. Hands‑on experience with leading EDA tools (Primetime, StarRC, Genus, Innovus, Design Compiler, ICC/ICC2, FC, Redhawk, and Calibre). Proficiency in clocking techniques and CTS. Experience in IP integration across various domains. Strong scripting skills (Python and Tcl). Proven problem‑solving and debugging capabilities. Fluent in English (spoken and written). Highly Preferred Experience in floorplanning and top‑level integration. Knowledge of chip‑package‑board co‑simulation and packaging. Experience working with EDA vendors to resolve tool issues. Understanding of semiconductor device physics and multi‑domain design. Location Work from one of our Axelera AI offices (Leuven in Belgium, Amsterdam and Eindhoven in the Netherlands, Florence and Milan in Italy or Bristol in the United Kingdom) if you are already based nearby. Work fully remotely from any European country (including the UK). Relocate with us to Italy (Florence or Milan) or the Netherlands (Amsterdam or Eindhoven). Priority will be given to candidates based in Belgium or Italy. What We Offer This is your chance to shape and be part of a dynamic, fast‑growing, international organization. We offer an attractive compensation package, supporting pension plan, extensive employee insurances, and the option to receive company shares. Our open culture supports creativity, continual innovation, and collaborative ownership with responsibility. Referrals increase your chances of interviewing at Axelera AI by 2×. Equal Opportunity Statement At Axelera AI, we wholeheartedly embrace equal opportunity and hold diversity in the highest regard. Our steadfast commitment is to cultivate a warm and inclusive environment that empowers and celebrates every member of our team. We welcome applicants from all backgrounds to join us in shaping the future of AI. Seniority Level: Mid‑Senior level Employment Type: Full‑time Job Functions: Engineering and Information Technology, Semiconductor Manufacturing #J-18808-Ljbffr


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