AI HW Fault Tolerance Specialist

il y a 1 semaine

Rennes, Bretagne, France Inria Temps plein
About the Project

This PhD thesis aims to study the impact of hardware faults not only on AI decisions but also on XAI models. The goal is to design self-explainable, trustworthy, reliable, and real-time verifiable AI hardware accelerators capable of performing self-test, self-diagnosis, and self-correction.

Key Activities
  • Analyze failure mechanisms affecting hardware;
  • Derive corresponding hardware faults and assess their impact on AI and XAI results;
  • Design low-cost fault tolerance approaches to detect and correct hardware faults;

The starting point will be existing state-of-the-art AI HW accelerators optimized for energy efficiency, and the outcome will be fault-tolerant versions, still energy efficient.

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