Ingénieur Digital Design/Verif

il y a 3 jours


Grenoble, Auvergne-Rhône-Alpes, France ELSYS Design Temps plein
Offre de poste

Dans le cadre d'un projet de conception d'un système de reconnaissance visuelle, basé sur une architecture à base de ASIC type SoC, nous recrutons un(e) Ingénieur(e) en microélectronique numérique pour assurer une partie du développement.

Missions
  • Définition d'architecture, rédaction de spécifications
  • Choix du partitionnement des fonctions entre programmation logique et microcontrôleur avec pour objectif une performance optimale
  • Intervention sur l'ensemble du flot de Design (description RTL, développement C, tests unitaire, intégration)
  • Intervention sur l'ensemble du flot de la Vérification fonctionnelle (plan de test, développement de test, UVM)
  • Rédaction documentaire
Compétences requises
  • Maîtrise du flot de développement ASIC
  • Maîtrise de langage de description RTL (VHDL, Verilog, SystemVerilog)
  • Analyse, réutilisation et modification de blocs complexes
  • Pratique de la gestion de configuration (Git, SVN, ClearCase)
  • Méthodologie du cycle en V et Agile
  • Connaissance ou intérêt pour la thématique de reconnaissance visuelle
  • Bonne compréhension en anglais technique (écrit et oral)
Qualités requises
  • Avoir une capacité d'apprentissage et une rigueur dans l'exécution
  • Savoir travailler en équipe et avoir le sens du service
  • Avoir une certaine facilité à communiquer avec différents types d'interlocuteurs

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