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Senior Analog IC Design Manager
il y a 3 semaines
Paris, Île-de-France SCALINX Temps pleinAnalog IC Design Team Lead OpportunityAbout the Role:We are seeking a highly skilled Analog IC Design Team Lead to join our team at SCALINX. As a key member of our engineering team, you will be responsible for leading a team of Analog IC designers and engineers in the development of complex mixed-signal IC products.Key Responsibilities:Lead a team of Analog...
Analog IC Design Engineer and Technical Leader
Il y a 2 mois
SCALINX's design team is seeking a dynamic and experienced analog designer who will contribute to the chip/block level architecture definition and implementation. In this role, the candidate will technically drive analog work-packages to deliver a state-of-the-art Integrated Circuit (IC) in deep submicron CMOS technology.
Key Responsibilities- Focus on the architecture and design of high-performance RF PLL.
- Lead and support analog design work-packages from transistor schematic to GDSII.
- Participate in the definition of the IC architecture and verification methodology.
- Drive the architecture definition of the analog part(s) under his/her responsibilities.
- Drive the specifications of the IC analog sub-blocks to get the best area/power/performance trade-off.
- Work in close collaboration with the layout team to define the floorplan strategy to meet the stringent performance requirements.
- Contribute to the design and verification methodology at chip level and sub-blocks level.
- Define the test strategy of the analog part(s) under his/her responsibilities and drive its implementation.
- Participate in the evaluation of the fabricated IC in our measurement lab.
- Work in a team to successfully design a state-of-the-art IC.
- Animate design reviews.
- Write documentation in accordance with company Quality Assurance policy.
- You have a MSc or PhD in Electrical Engineering or equivalent and 10+ years of hands-on experience in chip-level and circuit-level architecture definition, transistor level design and verification.
- You have a solid background in low jitter LC based PLL design on integrated circuit for high-speed and high-performance ADC/DAC data converters.
- You have string experience in PLL design in advanced node CMOS/FDSOI silicon technologies (22nm and beyond).
- You have a very good vision of the entire analog/mixed-signal IC design flow from transistor schematic to GDSII.
- You have a strong experience in mixed-signal IC project and technical leader role.
- You have an experience in the design of high-speed, low noise and interference robust analog and mixed-signal circuit.
- You have solid knowledge of analog design and simulation tools (Cadence Spectre).
- You are creative and proactive.
- You demonstrate good analytical and problem-solving skills.
- A strong experience with Cadence design flow is necessary.
- A strong experience with EM tools is necessary.
- You are a team player with a critical attitude and sense of initiative.
- You communicate fluently in English (oral and written).
