Research Engineer in Component Security
il y a 1 semaine
Job Offer
The position involves the implementation of hardware countermeasures in processor architectures based on the RISC-V ISA.
The tasks include:
• RTL implementation, verification, and documentation of security IPs, followed by their integration into RISC-V processors emulated on FPGA.
• Verification of CPU operation before and after integration of countermeasures.
• Development of a demonstrator around the developed countermeasure.
• Participation in the scientific dissemination of the team's research results (contributions to publications in international conferences) and in the promotion of our innovations (drafting of patents).
• Collaboration with other CEA teams on cross-functional projects.
In carrying out your mission, you will also be supported to develop expertise in the following areas:
• Processor architecture and its implementation.
• Hardware security.
• Digital design flow and advanced verification of the developed IPs.
You will benefit from a leading environment at CEA LETI in the field of hardware security and join a dynamic team at the heart of the physical object security ecosystem in France.
Candidate Profile
You hold a doctorate or an engineering/master's degree in digital design with:
• Good knowledge of design and FPGA tools and flows (Vivado, QuestaSim, Verilator, etc.).
• A good understanding of one or more RTL description languages: VHDL, Verilog, and/or SystemVerilog.
• An ability to lead a project independently.
Desired experience and/or skills:
• Experience in development and validation of FPGA hardware architecture.
• Knowledge or experience in hardware architecture or hardware security.
• Software development tools and approaches: version management (Git), compilation, testing strategies.
• Programming skills, preferably with proficiency in C/C++ and/or Python.
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