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Senior Analog IC Design Engineer and Technical Leader

Il y a 2 mois


Paris, Île-de-France SCALINX Temps plein

Job Type

Permanent

Location

Paris, Caen, Grenoble - France

Job Function

SCALINX's design team is seeking a highly skilled and experienced analog designer to contribute to the development of cutting-edge Integrated Circuits (ICs). In this role, the candidate will drive the technical aspects of analog work-packages to deliver state-of-the-art ICs in deep submicron CMOS technology.

Key Responsibilities

  • Focus on the architecture and design of high-performance RF PLLs.
  • Lead and support analog design work-packages from transistor schematic to GDSII.
  • Collaborate with project technical leaders to define IC architecture and verification methodology.
  • Participate in discussions with customers on product architecture and specification definition.
  • Drive the architecture definition of analog parts under responsibility.
  • Work with the analog design and layout team to define IC analog sub-blocks specifications for optimal area/power/performance trade-off.
  • Collaborate with the layout team to define floorplan strategies meeting stringent performance requirements.
  • Contribute to design and verification methodology at chip and sub-block levels.
  • Define test strategies for analog parts under responsibility and drive their implementation.
  • Participate in the evaluation of fabricated ICs in our measurement lab.
  • Animate design reviews.
  • Write documentation in accordance with company Quality Assurance policy.

Requirements

  • MSc or PhD in Electrical Engineering or equivalent, with 10+ years of hands-on experience in chip-level and circuit-level architecture definition, transistor-level design, and verification.
  • Solid background in low jitter LC-based PLL design on integrated circuits for high-speed and high-performance ADC/DAC data converters.
  • Strong experience in PLL design in advanced node CMOS/FDSOI silicon technologies (22nm and beyond).
  • Excellent understanding of the entire analog/mixed-signal IC design flow from transistor schematic to GDSII.
  • Strong experience in mixed-signal IC projects and technical leadership roles.
  • Experience in designing high-speed, low-noise, and interference-robust analog and mixed-signal circuits.
  • Solid knowledge of analog design and simulation tools (Cadence Spectre).
  • Creative and proactive approach.
  • Good analytical and problem-solving skills.
  • Strong experience with Cadence design flow and EM tools.
  • Team player with a critical attitude and sense of initiative.
  • Fluent communication skills in English (oral and written).