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Senior Physical Implementation Engineer
Il y a 2 mois
Menta is seeking a highly skilled Senior Physical Implementation Engineer to join our team in Sophia Antipolis, France. As a key member of our Physical Implementation team, you will be responsible for the ASIC physical implementation of eFPGA IP architectures, driving them from concept to production.
Key Responsibilities- Develop and implement eFPGA IP architectures, ensuring seamless integration with our internal design flow.
- Collaborate with cross-functional teams to design, improve, and maintain our internal design flow, driving innovation and efficiency.
- Participate in the development and implementation of new eFPGA features, leveraging your expertise in digital back-end EDA tool flows.
- Work closely with the R&D team to drive the development of new semiconductor products, leveraging advanced process nodes (from 180nm to 5nm and beyond).
- 10+ years of experience in ASIC physical implementation (Front-End and Back-End)
- In-depth knowledge of digital back-end EDA tool flows, including Synthesis, Place and Route, STA, Formal-Verification, and Signoff checks.
- Proficiency in Synopsys tools (ICC, ICC2, Primetime, StarRC, etc.) is a must, with knowledge of Mentor Graphics Calibre and Cadence tools a plus.
- Strong understanding of Power-management concepts and DFT concepts (scan, BIST, patterns generation,...).
- Experience with IP level and IP integration at top level, as well as simulation tools.
- Technical background in RTL design (VHDL, Verilog, SystemVerilog) and RTL synthesis is required.
- Excellent communication and problem-solving skills, with good written and spoken English.
- MSc or PhD in Electrical Engineering or equivalent.
Menta is a dynamic and innovative company, offering a challenging and rewarding work environment. As a Senior Physical Implementation Engineer, you will have the opportunity to work with a highly qualified team, driving the development of new semiconductor products and pushing the boundaries of eFPGA technology.
