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Digital IC Design Verification Engineer

Il y a 2 mois


Biot, Provence-Alpes-Côte d'Azur, France Arteris Temps plein
About Arteris

Arteris is a leading provider of innovative solutions for the development of system-on-chips (SoCs). Our mission is to enable engineering and design teams to create highly configurable and high-quality digital interconnects.

Job Description

We are seeking a skilled IC Design Verification Engineer to join our advanced engineering team in Sophia Antipolis, France. As a key member of our team, you will be responsible for the development of next-generation Arteris IP solutions, enabling the design of extremely configurable digital interconnects.

Key Responsibilities:
  1. Advanced UVM Based Test Bench Development and Debugging
  2. Defining, Documenting, Developing, and Executing RTL Verification Test/Coverage at System Level
  3. Performance Verification and Power-Aware Verification
  4. Triaging Regressions, Debugging RTL Designs in Verilog and System Verilog
  5. Help Improve and Refine Verification Process, Methodology, and Metrics
  6. UVM Expertise on Complex SoC Projects from Test Bench Development to Verification Closure
Experience Requirements / Qualifications:

Required:

  1. 2-3+ years of experience in SoC digital design & verification
  2. Verification flow enhancements using SW programming languages
  3. Strong RTL (Verilog) and UVM/C test bench debugging skills
  4. Experience integrating vendor provided VIPs for unit and system level verification
  5. Excellent problem-solving, strong communication, and teamwork skills
  6. Self-driven, able to work with minimum supervision

Desired:

  1. Experience with Arm AMBA protocols
  2. Experience with digital HW generators, methodology, and concept
Education Requirements:

PhD or master's degree in Computer Sciences or related field.