Implementation Engineers

SiPearl is working on one of the most exciting and technically challenging projects in Europe right nowdesigning the microprocessor powering supercomputers in the European union and the rest of the world for the years to come

To accomplish its mission SiPearl needs implementation engineers keen to work across a wide range of technologies and on methodologies at the state of the art. You will be involved in the implementation of products built around the highest performance cores and the latest standard protocols (AXI/CHI, PCIe, DDR, HBM )

As an implementation engineer, you will be interfacing with architecture, design & verification, physical implementation and software teams in order to make sure that the systems that SiPearl is building are performing to the highest level.

Opportunities to learn and develop technically as well as personally are aplenty here

**RESPONSIBILITIES**:

- Perform physical implementation on module-level using cutting-edge technologies (beyond 7nm)
- Perform physical verification on module-level (extraction, physical verification)
- Perform timing-closure by running STA and generating timing-ECOs
- Perform design-finishing (Logic-ECO-cells, Filler-, TCD-, ESD-cell, etc.)
- Optimize module-level layout for performance, power and area (Vt-Opt, clock-gating, etc.)
- Review and sign-off according to deliver final macro to toplevel team
- Work with synthesis
- and DfT-team to sort out netlist issues, suggesting solutions
- Insert and verify Power-Aware structures, e.g. isolation, always-on-buffer (using UPF flow)
- Work with DfT team for e.g. scan-chain-reordering
- Contribute in bring-up of Layout Flow (using Lynx environment)
- Work with IP design teams locally or remotely
- Work with ASIC service company for chip implementation in different time-zones

**LOCATION**:
SiPearl is welcoming implementation engineers in its offices in **France** (Maisons-Laffitte, Grenoble, Sophia-Antipolis), in** Germany** (Duisburg), and in **Spain** (Barcelona).

**USeful technical skills**:

- At least 5 years of experience of logical/physical synthesis, constraint development and signoff
- Senior experience in using synthesis tools especially Synopsys DC-NXT and Fusion-Compiler
- Senior experience in using STA tooling, especially Prime-Time
- Cadence tooling is a plus

**Your profile**:
We are looking for team players, able to work with multiple cultures both on site and remotely.
Being autonomous and flexible is mandatory. As a young and rapidly growing company, we welcome people who have a team-building mindset and who are eager to build the identity of the structure across multiple sites Of course, a good level of English, both written and spoken is mandatory as we have offices and partners across the world.

There will be opportunities to gain experience in other fields of digital systems engineering so engineers who want to develop a versatile and cross-functional skillset, we welcome you

**CONDITIONS & BENEFITS**:

- Fixed salary and variable part to be defined on experience
- Restaurant tickets
- Private insurance 70% covered by SiPearl
- At least 1 day of homeoffice per week

**CONTACT**: