Apprenticeship for a student enrolled in a French Engineering School or a French university

Characterisation of Transmitters, based on Integrated Photonic Circuits on InP.

Context
The evolution of communication networks has to cope with the continuous introduction of new services. These require high bandwidth, for a growing number of users (with a high number of connected devices): fifth generation mobile networks (5G), virtual reality services, high definition television services, cloud services. This requires the development of new generation optical transceivers operating at very high speeds. In particular, for data centres and optical access networks, significantly improved performance must be achieved for compact and manufacturable components with low production costs.

The team
The apprenticeship takes place in the Advanced Photonic Integration group of III-V Lab, which is composed of 11 people. The team's activity focuses on the design and characterisation of integrated photonic circuits (PICs) for the realisation of transmitters and receivers for the new generations of optical networks (access networks, data centres, long-distance communications). The PICs are realized in the III-V Lab, on InP and Silicon-on-Insulator (SOI) platforms. We work on different types of components, such as: lasers, optical amplifiers, electro-absorption modulators, Mach-Zehnder modulators; fast photodiodes.

Mission
The optical transmitters studied will be based on photonic circuits (PICs), realised by monolithic integration on InP: different active (transmission, modulation, amplification) and passive (guiding, multiplexing, filtering) functions will be integrated on the same chip.
The research programme associated with this study will follow the generic integration approach [13], [17], [18]; the basic optical functions are implemented on a set of simple components (the 'building blocks' - BBs), which can be combined to create PICs with more complex functions. The BBs can be parameterised to monitor and adjust their performance. The information on the integration technology and the design rules of the PICs are gathered in a process design kit (PDK).

The activity will be structured as follows:

- Analysis of the performance of active and passive BBs for the creation and updating of the PDK associated with the III-V Lab's PIC platform: centralised database for active and passive test circuits; methods for extracting BB performance indicators; compact modelling of BBs; statistical analysis of performance.
- Characterisation of transmitters built on the III-V Lab PIC platform: static and dynamic properties; transmission up to 50Gbauds.
- Contribution to the design of new generations of PICs to be realized with multi-project runs, on the III-V Lab platform: new generation of test circuits; new generation of very high speed transmitters (50Gbauds-100Gbauds).

Location of this apprenticeship : III-V Lab 1 Av. Augustin Fresnel, 91767 Palaiseau, France

We recruit without ethnic distinction, religion, gender, sexual orientation, or expression, age, marital status, disability.