Senior Ic Verification Engineer

il y a 5 jours


Sophia Antipolis, France IC Resources Temps plein

Salary: €50-70k (dependent on years of experience), bonus, RSUs
Job Type: Permanent
- Exciting new opportunity as Senior Design Verification Engineer to join the world leader in network on-chip interconnect technology integration and deployment for SoCs.- As Senior Design Verification Engineer, you will be working with skilled engineers who are passionate about what they do - and want the same from you
- As part of the role, you will create designs in a powerful language that blends traditional RTL with leading-edge software to provide extremely configurable, testable, and high-quality solutions. You will have the opportunity to be part of a proven-successful startup, and to influence development environment, architecture, verification, and everything in-between.**Responsibilities**:

- Advanced UVM based test bench development and debugging
- Defining, documenting, developing and executing RTL verification test/coverage at system level
- Performance verification and power-aware verification
- Triaging Regressions, Debugging RTL designs in Verilog and SystemVerilog
- Help improve and refine verification process, methodology, and metrics
- UVM expertise on complex SoC projects from test bench development to verification closure

**Experience, Requirements and Qualifications**:

- 5+ years of design and verification experience - interconnect verification experience is a bonus
- Verification flow enhancements using a scripting language such as Shell scripts, Python, TCL & JavaScript
- Strong RTL (Verilog) and UVM/C test bench debugging skills
- Experience integrating vendor provided VIPs for unit and system level verification
- Experience with Arm AMBA protocols
- This opportunity involves high performance, low power designs on a highly visible project

**Education**:

- MS degree in EE, CS, or equivalent preferred. BS degree minimum.

**Rob Hudson**:
**Senior Consultant**:
**T **:+44 (0)118 988 1153** **:



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