Senior Detector Design Engineer

At NcodiN, we are redefining the future of AI computing. Our breakthrough optical interposer shatters the limits of system integration, enabling the next generation of AI processors to scale beyond the copper wall. With the world's smallest laser integrated on silicon, we unleash the full potential of AI, setting a new industry standard for performance and efficiency.

Joining NcodiN today means becoming part of a bold, fast-growing company backed by industry leaders. We offer a dynamic environment where autonomy, creativity and innovation thrive. Here, respect, meritocracy, and team spirit drive success, ensuring that every individual grows while we push technology forward together.

As we scale rapidly, we are looking for visionary, adaptable minds ready to pioneer new solutions and shape the future of AI. If you thrive in a fast-paced, high-impact environment, join us and be part of the revolution.

Job description :

Location : 42 Cours Pierre Vasseur, 91120 PALAISEAU, France

Start date: March 2026

Contract: Full-time (CDI)

We are seeking a driven and talented engineer with expertise in semiconductor detector diodes. The role includes developing, optimizing, and deploying our integrated nanodetector R&D program. This role requires hands-on device development, technical depth, and close collaboration across internal teams.

Working under the Detector R&D Manager, you will own the technical execution of detector design projects — from high-level modeling and design rule definition to wafer-level validation and performance analysis — driving model-to-fab-to-test convergence through rigorous DOE campaigns and systematic data analysis.

This role establishes the detector design rules and learning loops that underpin NcodiN's integrated receiver technology, accelerating our path from concept to industrialization.

Key Responsibilities

1. Design and Modeling

• Use and refine in‑house multiphysics tools and compact models to design integrated detector stacks, covering all design apsects (e.g. absorption, carrier transport, bandwidth).
• Contribute to the development of high‑level design rules linking geometry, material stacks, process constraints, and performance targets.
• Design and execute design-of-experiment (DOE) strategies to validate hypotheses and accelerate convergence between simulation and experiment.
• Work with the Material department to specify epitaxial stacks matching the targeted performance specifications.
• Translate model outcomes into fabrication-ready design inputs aligned with process constraints and PDK conventions.

2. Characterization and Analysis

• Design and execute detector characterization campaigns, from test definition to data consolidation
• Systematically measure key performance metrics
• Maintain structured documentation, traceable measurement baselines, and instrument calibration and uncertainty budgets

3. Continuous Improvement

• Contribute to the technology watch on detector materials, device concepts, low‑noise front‑ends, and test methodologies
• Capture experimental feedback to refine models, design rules, and tool calibration
• Extract design insights from DOE campaigns and batch results to improve next-generation designs
• Document design rules, measurement protocols, and model-to-fab correlation findings

Profile & Requirements

• PhD or MSc in Optoelectronics, Photonics, Physics, or Electrical Engineering
• More than 5 years experience in semiconductor photodetectors and device physics
• Track record of converting model outputs and fab constraints into practical design rules

• Understand key performance metrics: responsivity, dark current, NEP, bandwidth and S‑parameters, linearity, saturation power, junction capacitance and impedance, temperature dependence

• Strong data analysis skills and familiarity with DOE methodologies

• Effective communicator with experience working across R&D, process, packaging, and test teams

Nice to Have

• Experience with integrated photonics and silicon photonics receiver chains
• Hands‑on experience with EM and semiconductor device simulation and compact modeling for bandwidth and noise
• Wafer‑level test structure design and tape‑out experience
• Knowledge of TIAs, impedance matching, high‑speed link requirements

You don't check all the boxes? Please submit an application anyway, we'll be happy to consider it.

Benefits

• Comprehensive Health Care Plan
• Life Insurance
• Meal vouchers
• Commuter Benefit (50% refund of public transportation pass)
• Generous Time Off (Vacation, Sick & Public Holidays)
• Flexible, hybrid workplace model
• Stock Option Plan

Actual pay will be based on several factors including work experience, location and education.

We strongly value a heterogeneous environment to bring perspective, experience and skills to the table, leading to innovation and creativity.