Verification Engineer
Il y a 5 mois
Novasparks est le leader mondial du traitement de données boursières à base de FPGA. Nous
fournissons, dans le monde entier, nos produits à des grandes banques et à des sociétés spécialisées
dans le trading. Les solutions Novasparks sont utilisées dans des domaines de pointe où la performance
et la robustesse priment avant tout. Nous sommes constamment à la recherche de nouveaux talents
pour résoudre les multiples challenges techniques soulevés par notre activité en forte croissance.
Le principal produit de Novasparks est une machine de décodage, filtrage et traitement des données
réseaux émises par les marchés financiers appelée feedhandler. La gamme de produits de Novasparks
couvre aujourd’hui tous les marchés principaux d’actions et de futurs en Amérique du Nord, Europe et
Asie (plus de 70 marchés). Les défis sont la réduction permanente de la latence dans l’ensemble des
modules RTL et l’augmentation des fonctionnalités de notre feedhandler pour atteindre la maturité
fonctionnelle d’une solution purement logicielle.
**Poste**: Ingénieur Vérification FPGA
**Lieu**: Paris (75014)
**Contrat**: CDI/freelance
**Salaire**: selon expérience
**Responsabilités**:
Intégré(e) au sein d’une équipe FPGA de 15 personnes, vous serez chargé(e) de la vérification et de la
validation des nouveaux designs RTL. Vous assurerez également la qualité des développements et de
leur adéquation avec la spécification.
Il sera ainsi nécessaire de mettre en place les outils et les méthodes de travail afin d’améliorer la
couverture de test en simulation lors des tests unitaires et également sur carte.
Pour ceci, vous serez amené(e) à travailler en étroite collaboration avec les développeurs FPGA et
que son intégration à l’ensemble du produit.
**Les différentes tâches consisteront à**:
Proposer des nouvelles méthodes de vérification (preuve formelle, framework innovant,...)- Intégrer les outils de vérification au processus de développement
- Mettre en place des plans de test
- Évaluer les différents risques de chaque design
- Ajout de monitoring pour la validation sur carte
- Écrire ou compléter des testbenchs (VHDL ou autre) afin d’augmenter la couverture de test
- Sensibilisation et formation des autres membre de l’équipe FPGA à la vérification
**Qualifications indispensables**:
- Expérience en vérification RTL
- Très bonne connaissance du RTL (VHDL/Verilog) et SystemVerilog
- Maîtrise du flow de simulation
- Bon niveau de scripting (Python, Bash)
- Rigueur et capacité d’analyse
- Capacité de communication avec les différentes équipes
**Qualifications appréciées**:
- UVM, cocoTB
- Outils de preuve formelle (VC Formal ou équivalent)
- Connaissances en C++
- Force de proposition
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