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Il y a 15 heures

Marseille, Provence-Alpes-Côte d'Azur, France China Fiber Optics Online Temps plein

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Provide critical contributions to the architecture, design, and validation of transceiver modules (e.g., QSFP‑DD, OSFP) supporting data rates of 800G and beyond. Serve as the technical owner and hardware architect for high‑speed coherent transceiver development, leading end‑to‑end hardware design from architecture definition through product release.
Define and drive the system‑level hardware architecture for new optical transceiver designs, including optical, electrical, thermal, and mechanical trade‑offs, as well as system integration, to meet performance, power, size, and reliability targets.
Own critical design decisions and technical risk assessments, proactively identifying challenges related to bandwidth scaling, noise, linearity, thermal management, manufacturability, and long‑term reliability.
Provide technical leadership in debugging complex cross‑disciplinary issues, spanning hardware, firmware, DSP interaction, and test infrastructure.
Define and review hardware design specifications, verification plans, and qualification requirements, ensuring compliance with carrier‑grade and industry standards.
Support NPI and volume production ramp, addressing yield, reliability, and cost optimization issues through design improvements and root‑cause analysis.
Familiar with the design and integration of key coherent hardware building blocks, including I/Q modulators (MZMs), coherent receivers, lasers, drivers, TIAs, high‑speed interconnects, and photonic components.
Function as a key technical contributor in design reviews, technology roadmap planning, and customer or internal technical discussions related to next‑generation coherent platforms....

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