Senior Verification Engineer — SystemVerilog

il y a 14 heures


Grenoble, France IC Resources Temps plein

A leading recruitment firm is seeking a Senior Verification Engineer for the Semiconductor Engineering division in Grenoble. This full-time opportunity involves leading R&D projects, developing verification environments using SystemVerilog/UVM, and training junior engineers. Ideal candidates have proven experience with IP or SoC verification and are fluent in English, with additional knowledge of French preferred. Join a friendly and growing environment with exciting projects.
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