Engineer Datacom Infrastructure

Engineer - Datacom Infrastructure & Network Synchronization

About the Role

A deep-tech company developing next-generation photonic timing and synchronization technologies for AI and high-performance computing data centers is looking for an Expert Engineer in Datacom Infrastructure & Network Synchronization.

The company is developing an advanced optical approach to timing and synchronization designed to address the limitations of conventional electronic synchronization architectures. The technology aims to enable ultra-low-jitter, low-power timing generation and distribution, providing a potential alternative to conventional oscillators, PLLs, retimers and Clock Data Recovery (CDR) architectures.

This is an opportunity to work at the intersection of datacom infrastructure, high-speed networking, SerDes, synchronization and photonics, helping shape how next-generation data center architectures are designed.

Main Mission

You will play a key role in the system-level integration of next-generation photonic timing technology into high-speed datacom systems.

You will define and evaluate architectural pathways through which photonic timing and synchronization can complement or replace conventional electronic timing elements within next-generation electrical/optical switches and Top-of-Rack (ToR) devices.

Your expertise in datacom infrastructure will be critical to ensuring interoperability with switch fabrics, SerDes/PHY architectures and optical control planes used in AI and high-performance data centers.

You will also contribute to product architecture, technical specifications and technology adoption strategies.

Key Responsibilities

• Define and refine integration strategies for photonic timing solutions within switches, ToR devices and high-speed networking equipment.
• Design synchronization architectures where optical timing becomes a native reference across racks, switches and servers.
• Analyse SerDes and PHY requirements to ensure interoperability between photonic timing solutions and next-generation ASICs and switch fabrics.
• Develop optical and hybrid timing architectures supporting phase alignment and low-jitter operation.
• Evaluate the impact of synchronization architectures on BER, PAM4/NRZ signaling, jitter tolerance, eye diagrams and overall link stability.
• Assess interoperability with existing timing and synchronization standards, including Ethernet, PTP, SyncE and White Rabbit.
• Define potential migration paths from conventional electronic synchronization toward next-generation optical timing architectures.
• Contribute to product specifications, including interfaces, packaging and system integration constraints.
• Collaborate with hyperscalers, switch vendors and technology partners to validate solutions in data-center-like environments.
• Contribute to technology roadmaps and system-level architectural decisions.

Candidate Profile

Education & Experience

• MSc or PhD in Telecommunications, Electrical Engineering, Network Engineering, Photonics, RF/Microwave Engineering or a related field.
• 5-10+ years of experience in datacom infrastructure, data center networking, switches, SerDes/PHY, synchronization systems, timing circuits or high-speed link design.
• Strong practical understanding of electronic oscillators, PLLs, retimers, CDRs and high-speed synchronization architectures.
• Experience working with high-speed electrical and/or optical communication systems.

Technical Skills

Ideally, you will have:

• Deep understanding of datacom synchronization architectures, including ToR systems, switches, SerDes and PHYs.
• Strong knowledge of electronic timing architectures such as VCOs, PLLs, CDRs and retimers, including their limitations at high data rates.
• Expertise in phase noise, jitter, frequency stability and clock distribution.
• Experience with BER testing, PAM4/NRZ modulation, FEC, eye diagrams and signal integrity.
• Understanding of high-speed optical/electrical links and t