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Implementation Engineer
il y a 7 jours
Paris, Île-de-France SiPearl Temps pleinAbout SiPearlSiPearl is a pioneering European company that aims to develop the next generation of energy-efficient microprocessors for high-performance computing applications. Our team is dedicated to designing and implementing cutting-edge silicon solutions that will shape the future of supercomputing. About the RoleWe are seeking a highly...
Physical Design Engineer
Il y a 2 mois
SiPearl is a pioneering technology company that embodies Europe's vision for innovation and excellence in the field of supercomputing. Founded in 2019 by visionary leader Philippe Notton, SiPearl is driven by a mission to develop cutting-edge microprocessors that will revolutionize the way we approach complex challenges in fields such as medical research, artificial intelligence, security, energy management, and climate change.
With a strong presence in Europe, SiPearl has established a network of offices in France, Germany, Spain, and other locations, fostering a collaborative environment that brings together talented individuals from diverse backgrounds. Our team is committed to pushing the boundaries of what is possible, and we are seeking like-minded professionals to join our mission.
About the RoleWe are seeking an experienced Implementation Specialist to join our Hardware department. As a key member of our team, you will work closely with our VP R&D Hardware, Vivian Blanchard, to perform physical implementation and verification on our design. Your expertise will be instrumental in ensuring the successful development of our microprocessors.
Key Responsibilities- Perform physical implementation on module-level using cutting-edge technologies (beyond 7nm)
- Perform physical verification on module-level (extraction, physical verification)
- Perform timing-closure by running STA and generating timing-ECOs
- Perform design-finishing (Logic-ECO-cells, Filler-, TCD-, ESD-cell, etc.)
- Optimize module-level layout for performance, power, and area (Vt-Opt, clock-gating, etc.)
- Review and sign-off according to deliver final macro to toplevel team
- Work with synthesis- and DfT-team to sort out netlist issues, suggesting solutions
- Insert and verify Power-Aware structures, e.g. isolation, always-on-buffer (using UPF flow)
- Collaborate with the DfT team (e.g. scan-chain-reordering)
- Contribute in bring-up of Layout Flow (using Lynx environment)
- Collaborate with the IP design teams locally or remotely
- Collaborate with the ASIC service company for chip implementation in different time-zones
- At least 5 years of experience in logical/physical synthesis, constraint development, and signoff
- Senior experience in using synthesis tools, especially Synopsys DC-NXT and Fusion-Compiler
- Senior experience in using STA tooling, especially Prime-Time
- Fluency in English is a prerequisite for success in this role, as effective communication in English is essential for collaboration and ensuring the seamless execution of responsibilities
- Cadence tooling
- Autonomy, flexibility, and adaptability
- Being a team player
- Contract: Permanent Contract (CDI)
- Benefits: meal vouchers (Sodexo), health insurance (70% covered by SiPearl), 8 to 9 RTTs, 5 days per year of remote work from any EU location
- Work model: Hybrid (2 days remote)
- Location: Maisons-Laffitte/Grenoble/Sophia Antipolis/Barcelona
- Award-winning company culture, including Hackathons, Training Challenges, Quarterly Kick-off sessions, team events, and company events
