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Post-doc Application of Formal Methods for Interference Management

Il y a 2 mois


Palaiseau, Île-de-France CEA Temps plein
Job Title: Post-doc Application of Formal Methods for Interference Management

We are seeking a highly skilled post-doc researcher to join our multidisciplinary technological research team at CEA LIST. The successful candidate will be involved in a national research project aiming to develop an environment to identify, analyze, and reduce interferences generated by the concurrent execution of applications on a heterogeneous commercial-off-the-shelf (COTS) multi-core hardware platform.

Key Responsibilities:
  • Propose and develop a formal modeling strategy for the temporal behavior of the hardware platform's microarchitecture and memory hierarchy based on microbenchmarking results.
  • Develop an approach to make the execution of applications more predictable by reducing interferences identified in point 1 via the definition of specific rules at the level of their execution model and programming model.
  • Communicate about the work to project partners and participate in the scientific dissemination of the team's research results.
Requirements:
  • PhD in the field of electronics or embedded systems.
  • Significant experience in architecture and/or compilation as well as in the use of formal methods.
  • First experience in the design and verification/validation of real-time applications on multicore architectures.
Desired Skills:
  • Computer architecture and programming: knowledge of multi/many-core architectures and their use in a context for the execution of real-time applications.
  • Formal methods: formal specification language, model-checking environment, SMT solvers, etc.
  • Compilation: knowledge of design environments for real-time systems (e.g. synchronous programming), compilation chains (LLVM / GCC).
Location:

CEA LIST, Saclay, France

Language:

English (Fluent), French (Fluent)