Countermeasures Against Power-off Laser Fault

**Countermeasures against power-off laser fault attacks**:

- Réf **ABG-126305**
- Stage master 2 / Ingénieur- Durée 6 mois- Salaire net mensuel 650€- 15/10/2024- Grenoble INP - LCIS- Lieu de travail- Valence Auvergne-Rhône-Alpes France- Champs scientifiques- Electronique
- Informatique
- Sciences de l’ingénieur
- Mots clés- embedded systems, electronics and FPGA design and simulation, hardware security, fault injection attacks-
- 31/01/2025**Établissement recruteur**:
**Site web**:
Le LCIS est un laboratoire de recherche public, équipe d’accueil de l’Université Grenoble Alpes associée à Grenoble-INP sur le campus UGA Valence.

Le LCIS rassemble plus de 60 chercheurs en informatique, électronique et automatique autour des systèmes embarqués et communicants.

Les thématiques abordées concernent la sûreté et la sécurité des systèmes embarqués et distribués, la modélisation, l’analyse et la supervision des systèmes complexes ouverts et les systèmes radiofréquences sans fil communicants.

Le LCIS est soutenu et financé par la région Auvergne-Rhône-Alpes.

**Description**:

- Secure circuits can be vulnerable to attacks exploiting hardware weaknesses. Active attacks involve
injecting faults during runtime to extract secret data or gain unauthorized access. One approach to
mitigate these threats is the integration of hardware detectors to detect or mitigate these attacks.
However, previous studies have shown that power-off attacks, such as temperature manipulation
when the circuits is power off, can alter the effectiveness of these detectors. New research has
focused on developing self-test capabilities to detect changes in detector characteristics, such as
internal frequency variations. The main goal of this internship is to prototype FPGA-based detectors
with these new integrated self-testing modules and assess whether this mechanism effectively
protects detectors against power-off attacks.
are:

- to prototype in FPGA hardware security detectors with new self-test modules,
- to realize temperature attack campaigns on FPGA prototypes to evaluate the efficiency of

the self-test modules against these attacks**Profil**:

- embedded systems,
- electronics/FPGA design and simulation.

Knowledge, interest or previous experience in hardware security would be a plus.**Prise de fonction**:

- 03/02/2025