Cadence Layout Engineer
il y a 5 heures
MACOM designs and manufactures semiconductor products for Data Center,
Telecommunication and Industrial and Defense applications. Headquartered in
Lowell, Massachusetts, MACOM has design centers and sales offices throughout
North America, Europe and Asia. MACOM is certified to the ISO9001 international
quality standard and ISO14001 environmental management standard.
MACOM has more than 65 years of application expertise with multiple design
centers, Si, GaAs and InP fabrication, manufacturing, assembly and test, and
operational facilities throughout North America, Europe, and Asia. Click here
to view our facilities. In addition, MACOM offers foundry services that
represent a key core competency within our business.
MACOM sells and distributes products globally via a sales channel comprised of
a direct field sales force, authorized sales representatives and leading
industry distributors. Our sales team is trained across all of our products to
give our customers insights into our entire portfolio.
MACOM is an Equal Opportunity Employer committed to a diverse workforce. MACOM
will not discriminate against any worker or job applicant on the basis of race,
color, religion, gender, gender identity, gender expression, national origin,
ancestry, age, sexual orientation, marital or civil partnership status,
pregnancy, disability, genetic information , veteran status, military
obligations, or membership in any other category protected under applicable
law.
Job Description:
- In
this role layout engineer with closely work with analog design team to
layout and verify custom analog/mixed-signal IPs - Lead
full-custom IC layout design and verification, including chip floor
planning, analog IP layout and chip level layout integration of various
analog, mixed signal and ASIC blocks - Full
verification of Block level and top-level layout including extraction,
DRC, LVS, and DFM checking - Layout
schedule planning and working with other IP layout engineers to integrate
various layout blocks - Co-work
with designers on block level and top-level floor planning - Layout
review for power/gnd routing, electro migration, signal path
check, matching, and signal coupling
Qualifications:
- High-speed
Mixed-Signal layout design expertise - Minimum 5 years of custom layout experience
- Knowledge
of Cadence Virtuoso design flow - High
level proficiency in interpretation of CALIBRE DRC, ERC, LVS reports. - Full
understanding of IR drop, RC delay, Electro migration and chip
finishing - Ability
to do floor planning and do area estimate - Good
communication with circuit designer and other layout engineers - Familiarity
with high-speed BiCMOS layout is a plus - Scripting
in Cadence is a plus - Bachelor
degree in Engineering
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