Principal Hardware Verification Engineer
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As a Principal Verification Engineer, you will play a leading role in developing the next generation of Arteris IP solutions, enabling verification of highly configurable chiplet interconnect architectures.
You will be part of the Advanced Engineering team and help shape the future of System-on-Chip design.
Key Responsibilities
- Lead the development of advanced test benches for next-generation interconnect validation
- Coordinate engineering activities to achieve verification objectives
- Define, document, develop, and execute RTL verification tests and coverage at system level
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