Systems Modelling Engineer for Next‑Gen AI Memory
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Vertical Compute seeks an expert System Modelling Engineer to lead SystemC modeling for their VIMx memory architectures. You will build robust models, integrate them on Cadence Palladium, and benchmark against an ideal SRAM baseline for AI workloads.
Responsibilities include co-simulation, validation, performance analysis, and reporting benefits of VIM in latency, bandwidth, energy efficiency, and area. A strong background in SystemC and emulation is required.