FPGA Prototyping Engineer
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Snap Inc is a technology company. We believe the camera presents the greatest opportunity to improve the way people live and communicate. Snap contributes to human progress by empowering people to express themselves, live in the moment, learn about the world, and have fun together.
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The Company operates Snapchat, a visual messaging app that enhances your relationships with friends, family, and the world, and Specs Inc., a wholly-owned subsidiary dedicated to making computing more human, in addition to Bitmoji, Saturn, and other digital services.
Specs Inc. is a wholly-owned subsidiary of Snap Inc. dedicated to making computing more human. The company develops Specs, advanced eyewear that seamlessly integrates digital experiences into the physical world. Specs feature see-through lenses that place digital objects directly into three-dimensional space, powered by Snap OS, a proprietary, context-aware operating system designed for natural interaction with your hands and voice. Specs Inc. also provides Lens Studio, a full suite of advanced developer tools that powers immersive augmented reality experiences across Specs, Snapchat, and other services.
We are looking for a Prototyping Design Engineer with strong SoC prototyping experience and enough embedded software skills to help bring platforms to life early. You will port complex SoC RTL onto FPGA or emulation platforms, enable boot and software validation flows, and collaborate across RTL, verification, system software, and infrastructure teams. This role is ideal for someone who can move between hardware integration and platform bring-up for SoC enablement.
What you’ll do:
• Port SoC and subsystem RTL onto FPGA, HAPS, and ZeBu platforms while keeping the prototyping code as close as possible to ASIC RTL and carefully managing target-specific conditionals.
• Rework RTL, wrappers, and platform-specific logic for prototyping targets, including HAPS/ZeBu-specific interface PHY changes and controller-presence handling to support common software flows across SoC, ZeBu, HAPS, and FPGA platforms.
• Debug complex hardware issues across HAPS, ZeBu, and FPGA targets, including memory-model integration, reset and clock sequencing, controller/PHY interaction, timing issues, waveform analysis and timing-report review.
• Partner with SoC, verification, infrastructure, and external vendors to root-cause issues and accelerate pre-silicon readiness.
• Integrate prototyping platforms into CI/CD flows and improve build reliability, automated regressions, artifact traceability, and shared platform infrastructure.
Knowledge, Skills & Abilities:
• Strong understanding of SoC RTL integration and the tradeoffs required to map large designs onto prototyping and emulation platforms.
• Hands-on experience with FPGA prototyping and hardware emulation platforms such as HAPS, ZeBu, or similar Cadence/Siemens/Synopsys environments. • Experience with Static timing analysis for XILINX/Intel FPGA platforms
• Familiarity with ARM Cortex-M/R/A architectures, SoC peripherals, and system interfaces such as LPDDR/DFI, eMMC, PCIe, JTAG/SWD, UART, SPI, I2C/I3C, GPIO, and QSPI Flash.
• Experience debugging clocks, resets, timing issues, waveforms, platform bring-up problems, and embedded software crashes or asserts across multiple pre-silicon targets.
• Ability to work from RTL, hardware schematics, datasheets, and timing reports, and to communicate platform limitations and integration constraints clearly across hardware and software teams.
• Strong problem-solving, communication, teamwork, and prioritization skills in a fast-paced cross-functional environment.
Minimum Qualifications:
• Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 5+ years of experience in SoC prototyping, FPGA/emulation bring-up or pre-silicon validation.
• Experience with RTL integration, FPGA prototyping, hardware emulation, or pre-silicon validation.
Preferred Qualifications:
• Experience with Siemens, Synopsys or Cadence emulation platforms.
• Experience running embedded software, diagnostics, or RTOS-based applications on FPGA or emulator platforms.
• Experience building or maintaining CI/CD pipelines for hardware prototyping such as GitLab or TeamCity.
• Experience working closely with system software teams and validation enablement.
If you have a disability or special need that requires accommodation, please don’t be shy and provide us some information.