PhD Position F/M Reliable Deep Neural Network Hardware Accelerators
il y a 4 semaines
Context and Background
Deep Neural Networks (DNNs) are currently one of the most intensively and widely used predictive models in the field of machine learning. DNNs have proven to give very good results for many complex tasks and applications, such as object recognition in images/videos, natural language processing, satellite image recognition, robotics, aerospace, smart healthcare, and autonomous driving.
There is intense activity in designing custom Artificial Intelligence (AI) hardware accelerators to support the energy-hungry data movement, speed of computation, and memory resources that DNNs require to realize their full potential. Furthermore, there is an incentive to migrate AI from the cloud into the edge devices, i.e., Internet-of-Things (IoTs) devices, in order to address data confidentiality issues and bandwidth limitations, given the ever-increasing internet-connected IoTs, and also to alleviate the communication latency, especially for real-time safety-critical decisions, e.g., in autonomous driving.
Research Goal
The goal of this PhD thesis is twofold: (i) designing and developing an optimized algorithm-level fault injection framework to assess the resiliency of DNN HW accelerators to HW faults, to enable the application of low-cost selective fault-tolerance strategies; (ii) designing selective fault-tolerance approaches for DNN HW accelerators by using the analysis provided by the fault injection method.
Main Activities
The PhD student will design and develop a methodology to perform large-scale fault analysis on state-of-the-art DNN hardware architectures. The fault analysis will determine the set of malignant HW faults that mostly impact the accuracy of classification (or other DNN objectives, such as image segmentation) during the inference phase.
The candidate will work under the supervision of three people: Olivier Sentieys, Angeliki Kritikakou, and Marcello Traiola. The candidate must have a Master's degree (or equivalent) in Computer Science, Computer Engineering, or Electrical Engineering. Proficiency in written English and fluency in spoken English or French are required.
Required Technical Skills
- Good knowledge of computer architectures and embedded systems
- HW design: VHDL/Verilog basics, HW synthesis flow
- Basic programming knowledge (C/C++, python)
- Basics of Machine Learning (pytorch/tensorflow)
- Experience with High Level Synthesis (HLS) is a plus
- Experience in fault-tolerant architectures is a plus
Advantages
- Subsidized meals
- Partial reimbursement of public transport costs
- Possibility of teleworking (90 days per year) and flexible organization of working hours
- Partial payment of insurance costs
Remuneration
A monthly gross salary amounting to 2000 euros for the first and second years and 2100 euros for the third year
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