Senior Digital Verification Manager
il y a 2 semaines
I am currently recruiting for a Senior Digital Verification Manager – to work for a major semiconductor company.
You will be managing an R&D team – made up of engineers who have a mix of hardware and software skills – for complex verification tasks on the latest developments for the semiconductor industry.
The ideal candidate will have a mix of functional and formal verification experience, as well as good control of a variety of software languages – like C++, java, python etc.
- ASIC & FPGA, at IP & SOC level
- Expert knowledge of UVM and System verilog
- Formal verification – SVA / system verilog assertions, jasper gold, VC Formal, Siemens EDA, OneSpin, MathWorks
- Software verification – python, CocoTB
- Modelling – System C, TLM, UML
- HW-SW interface
- Emulation / validation
- Software development methodologies / frameworks – AGILE, Jira, Scrum, Kanban, OOP, DevOps – CI / CD, automation etc
- Additional knowledge of IC design and architecture is a bonus
- Fluent English, plus French is preferred / a bonus
- EU working rights. Visa sponsorship will be considered on a case by case basis
- English AND French speakers will be preferred
Previous Team Management Experience Is a MUST.
Salary will be based on seniority and relevance of experience.
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