Design Engineer
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Senior Digital Design Engineer - PCIe / CXL / RTL
Location: Aix en Provence, France
Working Model: Hybrid, 3 days onsite / 2 days remote
Employment: Permanent, Full-Time
An established global semiconductor company is looking for a Senior Digital Design Engineer to join its growing Silicon IP team in Aix-en-Provence.
This is an opportunity to work on next-generation PCIe, CXL and AMBA controller IP, contributing to the architecture, microarchitecture and RTL implementation of high-performance connectivity solutions used in advanced computing and data centre applications.
You'll join an experienced international engineering team, working on technically challenging IP development projects with opportunities to contribute from initial architecture through to FPGA prototyping.
Responsibilities
- Contribute to the architecture and microarchitecture of next-generation PCIe, CXL and AMBA controller IP.
- Develop and implement RTL using Verilog and SystemVerilog.
- Collaborate closely with verification engineers throughout the development lifecycle.
- Support FPGA prototyping and validation of new IP designs.
- Work alongside international design teams on advanced semiconductor technologies.
Requirements
- 5+ years of professional RTL design experience.
- Strong Verilog / SystemVerilog skills.
- Experience with digital IP design and microarchitecture.
- Master's degree or PhD in Electrical Engineering, Computer Engineering or a related discipline.
- Good English communication skills.
- Experience with PCIe or CXL is highly desirable but not essential. Strong RTL designers with relevant IP development experience are encouraged to apply.
What's on Offer?
- Competitive salary plus performance bonus.
- Employee Stock Purchase Plan.
- Hybrid working with two days remote per week.
- Comprehensive family health insurance.
- Additional annual leave.
- Pension and savings benefits.
- Regular team lunches, breakfasts and a collaborative engineering environment.
- The opportunity to work on industry-leading connectivity IP within an established semiconductor business.
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