Principal RTL Design Engineer
Enregistrez cette offre et organisez votre recherche
Créez un compte gratuit pour enregistrer des offres d'emploi, créer des alertes et revenir à cette liste depuis votre tableau de bord.
En continuant, vous acceptez nos Conditions d’utilisation & Politique de confidentialité.
Job Title: Principal RTL Design Engineer
Location: France, Aix en Provence
Job Type: Permanent
Salary: Dependant on experience
Role Overview:
Seeking a full time Senior Design Engineer to join the IP Design Team.
Key Responsibilities:
- Contribute to the architecture and micro-architecture of next generation PCIe / CXL / AMBA controller IP
- Implement these designs in System Verilog
- Collaborate with the verification team to verify the IPs
- Participate in prototyping of the IPs in cutting edge FPGAs
Experience Required:
- Knowledge of PCIe / CXL
- RTL coding: Verilog / System Verilog
- Master's degree or PHD in Electrical Engineering, Computer Engineering or equivalent.
- Minimum of 5+ years of experience with RTL Design
- Good English skills, communication skills, and willingness to work with an international team.
What’s Offered:
Hybrid remote with 2-3 days/week onsite in Aix-en-Provence.
Not considering overseas relocation, or complex Visa candidates currently.