Senior ASIC Physical Implementation Engineer for IP/eFPGA

Il y a 5 jours

Valbonne, Provence-Alpes-Côte d'Azur, France Menta SAS Temps plein 50 000 € - 80 000 € Contrat
A technology firm specializing in ASIC design in Valbonne is seeking an experienced professional for ASIC physical implementation of eFPGA IP architectures. You will lead efforts from RTL to GDSII and improve internal design flows. Ideal applicants should have at least 5 years of relevant experience, strong communication skills, and proficiency in Synopsys and scripting tools. A Master's in Electrical Engineering is required. Join a challenging role within a dynamic, innovative team.