Remote Senior Digital Verification Engineer

Il y a 3 jours

Paris, Île-de-France Cadence Temps plein 90 000 € - 130 000 € Contrat

Cadence seeks a Senior Digital Verification Engineer to lead UVM verification for high-performance ASIC designs. You will build scalable verification environments, mentor junior engineers, and collaborate with design and software teams to ensure first-silicon success.

You will drive automated regression, optimize test-bench architectures, and contribute to verification guidelines while leveraging Cadence tools across locations in France (Rennes/Paris) with some remote days.