Senior Debug, Trace
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SiFive is seeking a hardware design technical lead focused on debug, trace and profiling IP to accelerate the adoption of RISC-V across SOC designs.
Un grand nombre de candidats pourrait postuler à ce poste, alors assurez-vous d'envoyer votre CV et votre candidature dès que possible.
You will help shape a highly configurable line of processor cores and lead the hardware design team in RTL development using Chisel/FIRRTL. xuezdbg
The role involves collaboration with architecture, performance, software and hardware teams, and engagement with customers and partners to evolve debugging solutions.
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Senior Debug, Trace
Il y a 3 jours
La Ciotat, Provence-Alpes-Côte d'Azur, France SiFive, Inc. Temps plein 110 000 € - 150 000 € ContratSiFive is seeking a hardware design technical lead focused on debug, trace and profiling IP to accelerate the adoption of RISC-V across SOC designs. You will help shape a highly configurable line of processor cores and lead the hardware design team in RTL development using Chisel/FIRRTL.The role involves collaboration with architecture, performance, software...
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Senior Debug, Trace
Il y a 23 heures
La Ciotat, Provence-Alpes-Côte d'Azur, France SiFive France SASU Temps plein 70 000 € - 90 000 € ContratSiFive France SASU is seeking a passionate hardware design engineer to create industry-leading debug, trace, and profiling IP essential for the adoption of RISC-V architecture in SoC designs.Responsibilities include designing debug hardware, collaborating with various teams, and ensuring documentation for a collaborative culture. Ideal candidates should...
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La Ciotat, Provence-Alpes-Côte d'Azur, France SiFive, Inc. Temps plein 110 000 € - 150 000 € ContratAbout SiFiveAs the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive's unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate,...
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Debug/Trace/Profiling Design Engineer
Il y a 23 heures
La Ciotat, Provence-Alpes-Côte d'Azur, France SiFive France SASU Temps plein 70 000 € - 90 000 € ContratJob DescriptionSiFive is seeking a hardware design engineer who is passionate about designing industry‑leading debug, trace and profiling IP to help drive the tidal wave of adoption of RISC‑V as the architecture of choice for SOC designs across a broad variety of vertical applications.ResponsibilitiesArchitect, design and implement debug, trace and...
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Lead Debug/Trace/Profiling Design Engineer
Il y a 3 semaines
La Ciotat, France SiFive Temps pleinAbout SiFiveAs the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate,...
