Lead Engineer in High-Speed Signal Integrity and SerDes Systems

il y a 4 semaines

Grenoble, Auvergne-Rhône-Alpes, France Adoc Talent Management Temps plein

Company

Adoc Talent Management is seeking a Lead Engineer in High-Speed Signal Integrity and SerDes Systems (M/F) for a prominent global ICT organization that specializes in Cloud and AI, telecommunications, consumer, and mobile sectors. This role is crucial for advancing the development of next-generation high-speed systems. The organization is a renowned multinational entity, and its research facility in Grenoble is enhancing its team dedicated to high-speed technology innovation.

Key Responsibilities

As a Lead Engineer in High-Speed Signal Integrity and SerDes Systems, you will be an integral part of the High-Speed High-Frequency team within the Board Engineering department at the Grenoble Research Center. Your responsibilities will encompass the innovation of high-speed (112Gbps+) interconnection technologies for ICT products:

  • Direct the architecture, design, and simulation of high-speed SerDes systems;
  • Oversee experimental validation of high-speed SerDes systems and ensure correlation with simulation outcomes;
  • Collaborate with the team in China, including technical reviews, regular updates, and project initiation;
  • Develop technology roadmaps and project plans for high-speed interconnection, providing technical insights into high-speed systems.

You will possess proven expertise with various technology generations, including 28, 56, 112, and 224 Gbps. A solid understanding of stringent manufacturing constraints and industrial operations is essential. You will initiate projects with external collaborators and may contribute to industry conferences.

Candidate Profile

The ideal candidate will hold a Master's degree or higher, with a PhD preferred, in Electrical Engineering, Information Technology, Communication Engineering, Electromagnetic Science, or a related field. You should have accumulated at least 8 years of experience in a comparable role within the industrial ecosystem.

In summary, you should meet the following qualifications:

  • Comprehensive knowledge and extensive experience in system hardware architecture design for telecom and communication products;
  • Significant experience in the development of high-speed products/prototypes at 56Gbps and beyond, with a successful track record in delivering 56Gbps+ products;
  • Strong understanding of high-speed SerDes architecture, including Rx/Tx SerDes PHY, Tx/Rx equalization techniques, CDR, and associated DSP challenges;
  • Familiarity with critical high-speed serial hardware components such as SerDes, high-speed ASICs, packages, DSPs, PCBs, and connectors;
  • Proficient in conducting high-speed serial link lab experiments/prototyping (utilizing real-time oscilloscopes, VNAs, etc.) and correlating results with simulations;
  • Knowledge of industry standards including IEEE 802.3/OIF-CEI standards, Common Electrical I/O (CEI)-224G, or InfiniBand.

Technical Skills

  • Experience in high-speed SerDes modeling and simulation, preferably using Python, Matlab, Verilog-A, or ADS;
  • Proficiency with signal integrity tools such as HFSS and CST.

You are a technology enthusiast, driven by curiosity and a desire to make impactful contributions in your area of expertise. Fluency in English, along with strong intercultural communication skills, is essential for collaborating effectively in international teams.

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