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PLL Technical Lead

Il y a 3 mois

Paris, Île-de-France IC Resources Temps plein

We are looking for an experienced Analog Designer to lead our PLL Analog IC Technical team. As the Analog Designer, you will play a key role in defining and implementing chip/block level architecture.

Responsibilities:

  • Focus on high performance RF PLL architecture and design
  • Lead and support analog design work-packages
  • Collaborate with project leaders to define IC architecture and verification methodology
  • Participate in discussions with customers on product architecture and specifications
  • Define architecture and specifications of analog sub-blocks
  • Work closely with the layout team to optimize area/power/performance trade-offs
  • Contribute to chip-level and sub-blocks design and verification methodology
  • Define test strategies and oversee implementation
  • Evaluate fabricated IC in the measurement lab
  • Participate in design reviews and document according to company Quality Assurance standards

Qualifications and Experience:

  • MSc or PhD in Electrical Engineering with 10+ years of chip-level and circuit-level design experience
  • Background in low jitter LC-based PLL design for high-speed data converters
  • Experience in advanced node CMOS/FDSOI silicon technologies
  • Familiarity with analog/mixed-signal IC design flow
  • Strong leadership and project management skills
  • Expertise in high-speed, low noise analog circuit design
  • Proficiency in Cadence Spectre and EM tools
  • Creative, proactive, analytical, and problem-solving oriented
  • Fluency in English

For further discussion about this position, please reach out to Parm Shergill. This is a full-time position based in Paris, Île-de-France.